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Circuit and system mechanisms for high field reliability

Principal Investigator
Seiji Kajihara (The Kyushu Institute of Technology / Professor)

Research Theme:
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} With the progress of VLSI technology, it becomes a crucial issue to deal with faults that occur in operational mode as well as the production test. In our work, we propose new mechanisms of circuits and systems that allow adaptive power-on testing to detect problems caused by aging and faults of VLSIs operating on the field, and to warn or recover before an error appears. The work tries to contribute not only to extension of MTTF (Mean Time To Failure) but also to supply of safe and secure systems for users.

Open Documents

2008 Program Review (October 2008) (PDF 493kB)
DVLSI Workshop 2008 (December 2008) (PDF 588kB)
2009 Program Review (April 2009) (PDF 893kB)
DVLSI Workshop 2009 (December 2009) (PDF 321kB)
2010 Program Review1 (June 2010) (PDF 570kB)
2010 Program Review2 (October 2010) Prof. Kajihara The Kyushu Institute of Technology (PDF 405kB)
2010 Program Review2 (October 2010) Associate Prof. Yoneda NAIST (PDF 461kB)
DVLSI Workshop 2011/3 (March 2011) (PDF 141kB)
DVLSI Workshop 2011/12 (December 2011) (PDF 1,306kB)
DVLSI Workshop 2012/6 (June 2012) (PDF 550kB) (English document)
DVLSI International Symposium 2012/12 (December 2012) (PDF 5,619kB) (English document)

Annual Reports

2008 Annual Report (PDF 453kB)
2009 Annual Report (PDF 491kB)
2010 Annual Report (PDF 455kB)
2011 Annual Report (PDF 616kB)

White Paper

Kajihara team DART White Paper(PDF 2,579kB)

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