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irs CREST DVLSI HOME Presented documents held on June 8-9, 2012

Presented documents on the DVLSI Program Review has been released. ...Program

Opening remarks by the research supervisor
"Presented title"--Name-- Affiliation download
"Opening remarkas on the DVLSI Program Review"
Dr. Shojiro Asai
Vice President, Rigaku Corporation
PDF 178kB

Documents of moderators (the order of sessions)
"Presented title"--Name-- Affiliation download
"Design Verifications & Test" What are dependability indices of VLSIs?
Prof. Shigeru Oho
(Nihon-kogyo Univ.)
PDF 404kB
"Architectures & Circuits" How can we define indices for dependability of VLSIs?
Prof. Masahiko Yoshimoto
(Kobe Univ.)
PDF 90kB

Documents of the invited panelists (the order of sessions)
"Presented title"--Name-- Affiliation download
uAn Era of Embedded Systemsv,u100M Dollar Lessonsv
Prof. Jiang Xu
iHong Kong University of Science and Technologyj
PDF 496kB
PDF 467kB
"Design Verifications & Test" Challenges of Logic Verification of VLSI
Dr. Koichiro Takayama
(Fujitsu Ltd.)
PDF 537kB
"Design Verifications & Test" Issues in Secure DVLSI Design
Dr. Sumio Morioka
(NEC Ltd. Central Research Lab.)
PDF 1,330kB
"Design Verifications & Test" Automotive Functional Safety Standard ISO26262 and Design Verification Technology
Dr. Yoshihiro Miyazaki
(Hitachi Auto Motive Systems Ltd.)
PDF 1,170kB
"Network & Connectivity" Advanced Wireless Cooperation mechanisms for Interference Mitigation in the 2.4 GHz ISM Band
Dr. Fumio Ishizu
(Mitsubishi Electric Ltd.)
PDF 247kB
"Network & Connectivity" Functional Safety and Dependability
Dr. Kohei Nadehara
(Renesas Electronics Ltd.)
PDF 155kB
"Architectures & Circuits" Challenge for developed technologies
Dr. Ken'ichi Osada
(Hitachi Central Research Lab.)
PDF 153kB
"Architectures & Circuits" Image of Trading Market for ECU Model
Dr. Kenji Anami
(Institute of Systems, Information Technologies and Nanotechnologies)
PDF 390kB

Documents of the research team panelists (the order of sessions) @@@@@@@@@@@@
"Presented title"--Name-- Affiliation download
"Design Verifications & Test" From the Viewpoint of Functional Safety
Associate Prof. Makoto Sugihara (Joint research member)
(Kyushu Univ.)
PDF 173kB
"Design Verifications & Test" Circuit and System mechanism for high field reliability
Prof. Seiji Kajihara (Research director)
(Kyushu Institute of Technology)
PDF 550kB
"Design Verifications & Test" Verification & Test on LSI design
Prof. Takeshi Fujino (Research director)
(Ritsumeikan Univ.)
PDF 1,020kB
"Design Verifications & Test"
Prof. Masahiro Fujita (Joint research member)
(Univ. of Tokyo)
PDF kB
"Network & Connectivity" Development of Dependable Wireless System and Device
Prof. Emeritus Kazuo Tsubouchi (Research director)
(Tohoku Univ.)
PDF 311kB
"Network & Connectivity" Multi-Chip NoC Approach for Automotive Applications
Prof. Tomohiro Yoneda (Research director)
(National Institute of Informatics)
PDF 1,018kB
"Network & Connectivity" Dependable Wireless Solid-State Drive(SSD)
Prof. Ken Takeuchi (Research director)
(Chuo Univ.)
Associate Prof. Hiroki Ishikuro (Joint research member)
(Keio Univ.)
PDF 1,150kB
"Architectures & Circuits" Fundamental Technology on Dependable SoC and SiP for Embedded Real-Time Systems
Associate Prof. Nobuyuki Yamasaki (Research director)
(Keio Univ.)
PDF 5,450kB
"Architectures & Circuits" Achieving Ultra Dependable VLSI
Prof. Syuichi Sakai (Research director)
(Univ. of Tokyo)
PDF 577kB
"Architectures & Circuits" Architecture and Circuits for Dependable 3D-VLSI
Prof. Mitsumasa Koyanagi (Research director)
(Tohoku Univ.)
PDF 2,400kB
"Architectures & Circuits" Dependable VLSI Platform using Robust Fabrics
Prof. Kazutoshi Kobayashi (Joint research member)
(Kyoto Institute of Technology)
PDF 708kB
"Architectures & Circuits" Dependable Memory Techniques for Highly Reliable VLSI System
Dr. Koji Nii (Joint research member)
(Renesas Electronics Ltd.)
PDF 857kB

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